%0 Conference Paper %1 conf/icecsys/RiedelCFWMBB23 %A Riedel, Samuel %A Cavalcante, Matheus A. %A Frouzakis, Manos %A Wüthrich, Domenic %A Mustafa, Enis %A Billa, Arlind %A Benini, Luca %B ICECS %D 2023 %I IEEE %K dblp %P 1-4 %T MinPool: A 16-core NUMA-L1 Memory RISC-V Processor Cluster for Always-on Image Processing in 65nm CMOS. %U http://dblp.uni-trier.de/db/conf/icecsys/icecsys2023.html#RiedelCFWMBB23 %@ 979-8-3503-2649-9

@inproceedings{conf/icecsys/RiedelCFWMBB23, added-at = {2024-01-18T00:00:00.000+0100}, author = {Riedel, Samuel and Cavalcante, Matheus A. and Frouzakis, Manos and Wüthrich, Domenic and Mustafa, Enis and Billa, Arlind and Benini, Luca}, biburl = {https://www.bibsonomy.org/bibtex/2472fc4f1dbe520f2d44994ca15e09864/dblp}, booktitle = {ICECS}, crossref = {conf/icecsys/2023}, ee = {https://doi.org/10.1109/ICECS58634.2023.10382925}, interhash = {1dc1d6d66ed6b80b3e09b92030c260cd}, intrahash = {472fc4f1dbe520f2d44994ca15e09864}, isbn = {979-8-3503-2649-9}, keywords = {dblp}, pages = {1-4}, publisher = {IEEE}, timestamp = {2024-04-09T16:20:25.000+0200}, title = {MinPool: A 16-core NUMA-L1 Memory RISC-V Processor Cluster for Always-on Image Processing in 65nm CMOS.}, url = {http://dblp.uni-trier.de/db/conf/icecsys/icecsys2023.html#RiedelCFWMBB23}, year = 2023 }