%0 Journal Article %1 journals/et/TranVBDGPW14 %A Tran, D. A. %A Virazel, Arnaud %A Bosio, Alberto %A Dilillo, Luigi %A Girard, Patrick %A Pravossoudovitch, Serge %A Wunderlich, Hans-Joachim %D 2014 %J J. Electron. Test. %K dblp %N 4 %P 401-413 %T A New Hybrid Fault-Tolerant Architecture for Digital CMOS Circuits and Systems. %U http://dblp.uni-trier.de/db/journals/et/et30.html#TranVBDGPW14 %V 30

@article{journals/et/TranVBDGPW14, added-at = {2023-03-21T00:00:00.000+0100}, author = {Tran, D. A. and Virazel, Arnaud and Bosio, Alberto and Dilillo, Luigi and Girard, Patrick and Pravossoudovitch, Serge and Wunderlich, Hans-Joachim}, biburl = {https://www.bibsonomy.org/bibtex/26d7ef0b1510b0bf2266b639776634dc8/dblp}, ee = {https://doi.org/10.1007/s10836-014-5459-3}, interhash = {a8b7fdf0fc71c65fdb4d4ac38012c045}, intrahash = {6d7ef0b1510b0bf2266b639776634dc8}, journal = {J. Electron. Test.}, keywords = {dblp}, number = 4, pages = {401-413}, timestamp = {2024-04-08T20:52:19.000+0200}, title = {A New Hybrid Fault-Tolerant Architecture for Digital CMOS Circuits and Systems.}, url = {http://dblp.uni-trier.de/db/journals/et/et30.html#TranVBDGPW14}, volume = 30, year = 2014 }