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Design of an efficient OFDM burst synchronization scheme., , и . ISCAS (3), стр. 449-452. IEEE, (2002)FLINT+: A Runtime-Configurable Emulation-Based Stochastic Timing Analysis Framework, , , , , и . International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS), IEEE, (2017)A framework for hardware-based DVFS management in multicore mixed-criticality systems., и . ReCoSoC, стр. 1-7. IEEE, (2015)Crosstalk optimization for through-silicon vias by exploiting temporal signal misalignment., , , и . Integr., (2019)A Fair Comparison of Adders in Stochastic Regime, , , и . International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS), IEEE, (2017)Automated Toolchain for Enhanced Productivity in Reconfigurable Multi-accelerator Systems., , , , и . ARC, том 12083 из Lecture Notes in Computer Science, стр. 45-60. Springer, (2020)Accelerator Framework of Spike-By-Spike Neural Networks for Inference and Incremental Learning in Embedded Systems., , , и . MOCAST, стр. 1-5. IEEE, (2020)Hardware-Assisted Signal Activity Analysis for Power Estimation in Rapid Prototyped Systems., , , и . Des. Autom. Embed. Syst., 8 (4): 297-308 (2003)Heterogeneous 3D Integration for a RISC-V System With STT-MRAM., , , , , , , , и . IEEE Comput. Archit. Lett., 19 (1): 51-54 (2020)High-Performance Logic-on-Memory Monolithic 3-D IC Designs for Arm Cortex-A Processors., , , , , , , , , и 2 other автор(ы). IEEE Trans. Very Large Scale Integr. Syst., 29 (6): 1152-1163 (2021)