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Disambiguation of "Sasao, Tsutomu"

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Numerical Function Generators Using Edge-Valued Binary Decision Diagrams.

, , and . ASP-DAC, page 535-540. IEEE Computer Society, (2007)

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Tsutomu Munakata

Tsutomu Haga

 

Other publications of authors with the same name

Worst and Best Irredundant Sum-of-Products Expressions., and . IEEE Trans. Computers, 50 (9): 935-948 (2001)Easily Testable Realizations for Generalized Reed-Muller Expressions.. IEEE Trans. Computers, 46 (6): 709-716 (1997)Cascade Realization of 3-Input 3-Output Conservative Logic Circuits., and . IEEE Trans. Computers, 27 (3): 214-221 (1978)On the Optimal Design of Multiple-Valued PLA's.. IEEE Trans. Computers, 38 (4): 582-592 (1989)Realization of Minimum Circuits with Two-Input Conservative Logic Elements., and . IEEE Trans. Computers, 27 (8): 749-752 (1978)Remarks on the Design of First Digital Computers in Japan - Contributions of Yasuo Komamiya., , , and . EUROCAST (1), volume 12013 of Lecture Notes in Computer Science, page 123-130. Springer, (2019)A Method to Find Linear Decompositions for Incompletely Specified Index Generation Functions Using Difference Matrix., , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 97-A (12): 2427-2433 (2014)A Systematic Design Method for Two-Variable Numeric Function Generators Using Multiple-Valued Decision Diagrams., , and . IEICE Trans. Inf. Syst., 93-D (8): 2059-2067 (2010)A Balanced Decision Tree Based Heuristic for Linear Decomposition of Index Generation Functions., , and . IEICE Trans. Inf. Syst., 100-D (8): 1583-1591 (2017)An Update Method for a Low Power Cam Emulator Using an LUT Cascade Based on an EVMDD (k)., , , and . J. Multiple Valued Log. Soft Comput., 26 (1-2): 109-123 (2016)