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Traffic-Aware Design of a High-Speed FPGA Network Intrusion Detection System.

, , and . IEEE Trans. Computers, 62 (11): 2322-2334 (2013)

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Traffic-Aware Design of a High-Speed FPGA Network Intrusion Detection System., , and . IEEE Trans. Computers, 62 (11): 2322-2334 (2013)Fault tolerant design of signed digit based FIR filters., , , and . ISCAS, IEEE, (2006)A Fingerprint-based Bloom Filter with Deletion Capabilities., , , and . EuCNC, page 453-458. IEEE, (2019)On the use of signed digit arithmetic for the new 6-inputs LUT based FPGAs., , , and . ICECS, page 602-605. IEEE, (2008)Relaxing state-access constraints in stateful programmable data planes., , , and . Comput. Commun. Rev., 48 (1): 3-9 (2018)Concurrent Error Detection in Reed-Solomon Encoders and Decoders., , , and . IEEE Trans. Very Large Scale Integr. Syst., 15 (7): 842-846 (2007)Optimized Implementation of RNS FIR Filters Based on FPGAs., , , and . J. Signal Process. Syst., 67 (3): 201-212 (2012)Concurrent Error Detection for Orthogonal Latin Squares Encoders and Syndrome Computation., , and . IEEE Trans. Very Large Scale Integr. Syst., 21 (12): 2334-2338 (2013)Low Delay Single Symbol Error Correction Codes Based on Reed Solomon Codes., , , and . IEEE Trans. Computers, 64 (5): 1497-1501 (2015)XTRA: Towards Portable Transport Layer Functions., , , , , , and . IEEE Trans. Netw. Serv. Manag., 16 (4): 1507-1521 (2019)