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Disambiguation of "Hosseini, Kaveh"

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A spur-free MASH digital delta-sigma modulator with higher order shaped dither.

, , , , , , and . ECCTD, page 723-726. IEEE, (2009)

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Taghi Kaveh

Kaveh Arzani

Kaveh Towfighi

Afshin Hosseini

Mahmoud Hosseini

 

Other publications of authors with the same name

8 Tbps Co-Packaged FPGA and Silicon Photonics Optical IO., , , , , , , , , and 16 other author(s). OFC, page 1-3. IEEE, (2021)A spur-free MASH digital delta-sigma modulator with higher order shaped dither., , , , , , and . ECCTD, page 723-726. IEEE, (2009)Architectures for Maximum-Sequence-Length Digital Delta-Sigma Modulators., and . IEEE Trans. Circuits Syst. II Express Briefs, 55-II (11): 1104-1108 (2008)Mathematical Analysis of a Prime Modulus Quantizer MASH Digital Delta-Sigma Modulator., and . IEEE Trans. Circuits Syst. II Express Briefs, 54-II (12): 1105-1109 (2007)Simultaneous Error-Free Data Modulation with Silicon Microdisks in the Multi-FSR Regime for Scalable DWDM Links., , , , , , , and . OFC, page 1-3. IEEE, (2023)Observations Concerning the Generation of Spurious Tones in Digital Delta-Sigma Modulators Followed by a Memoryless Nonlinearity., , and . IEEE Trans. Circuits Syst. II Express Briefs, 58-II (11): 714-718 (2011)Maximum Sequence Length MASH Digital Delta-Sigma Modulators., and . IEEE Trans. Circuits Syst. I Regul. Pap., 54-I (12): 2628-2638 (2007)Prediction of the Spectrum of a Digital Delta-Sigma Modulator Followed by a Polynomial Nonlinearity., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 57-I (8): 1905-1913 (2010)Calculation of cycle lengths in MASH 1-2-2 digital delta sigma modulators with a constant input., , , and . ECCTD, page 627-630. IEEE, (2009)5.12 Tbps Co-Packaged FPGA and Silicon Photonics Interconnect I/O., , , , , , , , , and 25 other author(s). VLSI Technology and Circuits, page 260-261. IEEE, (2022)