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Switched by input: power efficient structure for RRAM-based convolutional neural network.

, , , , , , , and . DAC, page 125:1-125:6. ACM, (2016)

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Technological Exploration of RRAM Crossbar Array for Matrix-Vector Multiplication., , , , , , , , , and . J. Comput. Sci. Technol., 31 (1): 3-19 (2016)Stuck-at Fault Tolerance in RRAM Computing Systems., , , , , , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 8 (1): 102-115 (2018)Switched by input: power efficient structure for RRAM-based convolutional neural network., , , , , , , and . DAC, page 125:1-125:6. ACM, (2016)NEST: DIMM based Near-Data-Processing Accelerator for K-mer Counting., , , , and . ICCAD, page 28:1-28:9. IEEE, (2020)Brain-Inspired Computing: Adventure from Beyond CMOS Technologies to Beyond von Neumann Architectures ICCAD Special Session Paper., , , , , , , , , and . ICCAD, page 1-9. IEEE, (2021)RADAR: a 3D-reRAM based DNA alignment accelerator architecture., , , and . DAC, page 59:1-59:6. ACM, (2018)BEACON: Scalable Near-Data-Processing Accelerators for Genome Analysis near Memory Pool with the CXL Support., , , and . MICRO, page 727-743. IEEE, (2022)ASMCap: An Approximate String Matching Accelerator for Genome Sequence Analysis Based on Capacitive Content Addressable Memory., , , , , , , , , and 1 other author(s). DAC, page 1-6. IEEE, (2023)MNSIM: Simulation platform for memristor-based neuromorphic computing system., , , , , , , , , and 2 other author(s). DATE, page 469-474. IEEE, (2016)NMTSim: Transaction-Command Based Simulator for New Memory Technology Devices., , , , , and . IEEE Comput. Archit. Lett., 19 (1): 76-79 (2020)