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Disambiguation of "Macii, Alberto"

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On-chip process variation-tracking through an all-digital monitoring architecture.

, , , , and . IET Circuits Devices Syst., 6 (5): 366-373 (2012)

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Alberto Fierro

Alberto Moreira

Alberto Coda

Alberto Ricco

Alberto Moreira

 

Other publications of authors with the same name

Synthesis of application-specific memories for power optimization in embedded systems., , , and . DAC, page 300-303. ACM, (2000)On-chip process variation-tracking through an all-digital monitoring architecture., , , , and . IET Circuits Devices Syst., 6 (5): 366-373 (2012)Stream synthesis for efficient power simulation based on spectral transforms., , , and . IEEE Trans. Very Large Scale Integr. Syst., 9 (3): 417-426 (2001)Architectures and synthesis algorithms for power-efficient businterfaces., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 19 (9): 969-980 (2000)A recursive algorithm for low-power memory partitioning., , and . ISLPED, page 78-83. ACM, (2000)Guest Editorial for the Special Section on Emerging Computational Paradigms., and . IEEE Trans. Emerg. Top. Comput., 6 (3): 303-304 (2018)From Architecture to Layout: Partitioned Memory Synthesis for Embedded Systems-on-Chip., , , , and . DAC, page 784-789. ACM, (2001)Reducing Timing Overhead in Simultaneously Clock-Gated and Power-Gated Designs by Placement-Aware Clustering., , , , and . PATMOS, volume 5953 of Lecture Notes in Computer Science, page 227-236. Springer, (2009)Offline Data Profiling Techniques to Enhance Memory Compression in Embedded Systems., , and . PATMOS, volume 2451 of Lecture Notes in Computer Science, page 314-322. Springer, (2002)Thermal-Aware Clock Tree Design to Increase Timing Reliability of Embedded SoCs., , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 57-I (10): 2741-2752 (2010)