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A dual channel IF-digitizing IC with 117dB dynamic range at 300Mhz IF for EDGE/GSM base-stations receiver.

, , , , , , , , , , , and . CICC, page 413-416. IEEE, (2004)

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A 14-bit 2.5GS/s and 5GS/s RF sampling ADC with background calibration and dither., , , , , , , , , and 7 other author(s). VLSI Circuits, page 1-2. IEEE, (2016)A dual channel IF-digitizing IC with 117dB dynamic range at 300Mhz IF for EDGE/GSM base-stations receiver., , , , , , , , , and 2 other author(s). CICC, page 413-416. IEEE, (2004)A 16-bit 250-MS/s IF Sampling Pipelined ADC With Background Calibration., , , , , , , , , and 4 other author(s). IEEE J. Solid State Circuits, 45 (12): 2602-2612 (2010)A 14 Bit 1 GS/s RF Sampling Pipelined ADC With Background Calibration., , , , , , , , , and 4 other author(s). IEEE J. Solid State Circuits, 49 (12): 2857-2867 (2014)A 16b 250MS/s IF-sampling pipelined A/D converter with background calibration., , , , , , , , , and 3 other author(s). ISSCC, page 292-293. IEEE, (2010)16.1 A 12b 18GS/s RF Sampling ADC with an Integrated Wideband Track-and-Hold Amplifier and Background Calibration., , , , , , , , , and . ISSCC, page 250-252. IEEE, (2020)29.3 A 14b 1GS/s RF sampling pipelined ADC with background calibration., , , , , , , , , and 5 other author(s). ISSCC, page 482-483. IEEE, (2014)A 12-b 18-GS/s RF Sampling ADC With an Integrated Wideband Track-and-Hold Amplifier and Background Calibration., , , , , , , and . IEEE J. Solid State Circuits, 55 (12): 3210-3224 (2020)