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An SRAM-based novel hardware architecture for longest prefix matching for IP route lookup.

, , and . Photonic Netw. Commun., 32 (3): 359-371 (2016)

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CB-RPL: Coordinator-Based RPL for Energy Efficient Routing Mechanism., and . ANTS, page 231-236. IEEE, (2022)An SRAM-based novel hardware architecture for longest prefix matching for IP route lookup., , and . Photonic Netw. Commun., 32 (3): 359-371 (2016)k-Degree Parallel Comparison-Free Hardware Sorter for Complete Sorting., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 42 (5): 1438-1449 (May 2023)An Energy-Efficient Pipelined-Multiprocessor Architecture for Biological Sequence Alignment., , and . IEEE Trans. Very Large Scale Integr. Syst., 28 (12): 2598-2611 (2020)A Fine-grained Integrated IP Lookup Engine for Multigigabit IP Processing., , , , and . ANTS, page 1-6. IEEE, (2018)Time and Space Efficient Optimal Pairwise Sequence Alignment using GPU., , , , , and . TENCON, page 423-428. IEEE, (2019)Worst Case O(N) Comparison-Free Hardware Sorting Engine., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 41 (10): 3332-3345 (2022)$O(N)$O(N) Memory-Free Hardware Architecture for Burrows-Wheeler Transform., and . IEEE Trans. Computers, 72 (7): 2080-2093 (July 2023)Memory Efficient Hash-Based Longest Prefix Matching Architecture With Zero False +ve and Nearly Zero False -ve Rate for IP Processing., , and . IEEE Trans. Computers, 71 (6): 1261-1275 (2022)SRAM based longest prefix matching approach for multigigabit IP processing., , and . IEEE ANTS, page 1-6. IEEE, (2015)