( en | de | ru )

 

Disambiguation of "Knag, Phil C."

Author of the publication

copydeleteadd this publication to your clipboard
A 617-TOPS/W All-Digital Binary Neural Network Accelerator in 10-nm FinFET CMOS.

, , , , , , , , , , and . IEEE J. Solid State Circuits, 56 (4): 1082-1092 (2021)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Petter Knagenhjelm

Bernhard Knagge

Phil Zundel

Phil Langer

Phil Liebing

 

Other publications of authors with the same name

A 617-TOPS/W All-Digital Binary Neural Network Accelerator in 10-nm FinFET CMOS., , , , , , , , , and 1 other author(s). IEEE J. Solid State Circuits, 56 (4): 1082-1092 (2021)An 8-core RISC-V Processor with Compute near Last Level Cache in Intel 4 CMOS., , , and . VLSI Technology and Circuits, page 68-69. IEEE, (2022)Low-Clock-Power Digital Standard Cell IPs for High-Performance Graphics/AI Processors in 10nm CMOS., , , , , , , , , and 6 other author(s). VLSI Circuits, page 1-2. IEEE, (2020)An Eight-Core RISC-V Processor With Compute Near Last Level Cache in Intel 4 CMOS., , , and . IEEE J. Solid State Circuits, 58 (4): 1117-1128 (2023)microASR: 32-μW Real-Time Automatic Speech Recognition Chip featuring a Bio-Inspired Neuron Model and Digital SRAM-based Compute-In-Memory Hardware., , , , , and . ESSCIRC, page 421-424. IEEE, (2023)Evaluating and Enhancing Intel® Stratix® 10 FPGAs for Persistent Real-Time AI., , , , , , , , , and 6 other author(s). FPGA, page 119. ACM, (2019)A 617 TOPS/W All Digital Binary Neural Network Accelerator in 10nm FinFET CMOS., , , , , , , , , and 1 other author(s). VLSI Circuits, page 1-2. IEEE, (2020)A 4096-Neuron 1M-Synapse 3.8PJ/SOP Spiking Neural Network with On-Chip STDP Learning and Sparse Weights in 10NM FinFET CMOS., , , , and . VLSI Circuits, page 255-256. IEEE, (2018)25.9 Reconfigurable Transient Current-Mode Global Interconnect Circuits in 10nm CMOS for High-Performance Processors with Wide Voltage-Frequency Operating Range., , , , , , , , , and 4 other author(s). ISSCC, page 396-398. IEEE, (2020)Why Compete When You Can Work Together: FPGA-ASIC Integration for Persistent RNNs., , , , , , , , , and 6 other author(s). FCCM, page 199-207. IEEE, (2019)