Author of the publication

Design of a package for a high-speed processor made with yield-limited technology.

, , , and . Great Lakes Symposium on VLSI, page 110-113. IEEE, (1994)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

A 32-word by 32-bit three-port bipolar register file implemented using a SiGe HBT BiCMOS technology., and . IEEE J. Solid State Circuits, 37 (2): 228-236 (2002)140 Gb/s Serializer Using Clock Doublers in 90 nm SiGe Technology., , , , , and . IEEE J. Solid State Circuits, 50 (11): 2703-2713 (2015)Experimental Measurement of the Second-Order Interfrequency Correlation Function of the Random Surface Scatter Channel., and . IEEE Trans. Commun., 23 (3): 341-347 (1975)High-Speed Reconfigurable Circuits for Multirate Systems in SiGe HBT Technology., , , , , , , , , and . Proc. IEEE, 103 (7): 1181-1196 (2015)Reconfigurable 40 GHz BiCMOS uniform delay crossbar switch for broadband and wide tuning range narrowband applications., , , , , and . IET Circuits Devices Syst., 5 (3): 159-169 (2011)Leveraging TCGA gene expression data to build predictive models for cancer drug response., , , and . BMC Bioinform., 21-S (14): 364 (2020)Multi-ghz Sige Bicmos Fpgas with New Architecture and Novel Power Management Techniques., , , , , , , and . J. Circuits Syst. Comput., 14 (2): 179-194 (2005)A 5-10GHz SiGe BiCMOS FPGA with new configurable logic block., , , , , , , and . Microprocess. Microsystems, 29 (2-3): 121-131 (2005)Optimal Differential Routing based on Finite State Machine Theory., , and . VLSI Design, 9 (2): 105-117 (1999)A 10 GHz 4: 1 MUX and 1: 4 DEMUX implemented by a Gigahertz SiGe FPGA for fast ADC., , , , , , , , and . Integr., 38 (3): 525-540 (2005)