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The tunnelling field effect transistors (TFET): the temperature dependence, the simulation model, and its application.

, , , and . ISCAS (3), page 713-716. IEEE, (2004)

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Yield and speed optimization of a latch-type voltage sense amplifier., , and . IEEE J. Solid State Circuits, 39 (7): 1148-1158 (2004)Dynamic state-retention flip-flop for fine-grained power gating with small design and power overhead., , , , , , and . IEEE J. Solid State Circuits, 41 (7): 1654-1661 (2006)The tunnelling field effect transistors (TFET): the temperature dependence, the simulation model, and its application., , , and . ISCAS (3), page 713-716. IEEE, (2004)Making adiabatic circuits attractive for todays VLSI industry by multi-mode operation-adiabatic mode circuits., , , , and . Conf. Computing Frontiers, page 414-420. ACM, (2005)Impact of process parameter variations on the energy dissipation in adiabatic logic., , , , , and . ECCTD, page 429-432. IEEE, (2005)A yield-optimized latch-type SRAM sense amplifier., , and . ESSCIRC, page 409-412. IEEE, (2003)Circuit design issues in multi-gate FET CMOS technologies., , , , , , , , , and 5 other author(s). ISSCC, page 1656-1665. IEEE, (2006)MALTY--A memory test structure for analysis in the early phase of the technology development., , , , , , , , , and . Microelectron. Reliab., 43 (9-11): 1383-1387 (2003)