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A 5 Gb/s 3.2 mW/Gb/s 28 dB loss-compensating pulse-width modulated voltage-mode transmitter., , и . CICC, стр. 1-4. IEEE, (2013)A 75dB SNDR, 10MHz conversion bandwidth stage-shared 2-2 MASH ΔΣ modulator dissipating 9mW., , , и . CICC, стр. 1-4. IEEE, (2011)A 2.8 mW/Gb/s, 14 Gb/s Serial Link Transceiver., , , , , , , и . IEEE J. Solid State Circuits, 52 (5): 1399-1411 (2017)A 4-to-10.5 Gb/s Continuous-Rate Digital Clock and Data Recovery With Automatic Frequency Acquisition., , , , , , , и . IEEE J. Solid State Circuits, 51 (2): 428-439 (2016)Low-Jitter Multi-Output All-Digital Clock Generator Using DTC-Based Open Loop Fractional Dividers., , , , и . IEEE J. Solid State Circuits, 53 (6): 1806-1817 (2018)Quantifying the Impact of Prognostic Distance on Average Cost per Cycle., , , и . ICPHM, стр. 1-7. IEEE, (2019)A 2.5-5.0-GHz Clock Multiplier With 3.2-4.5-mUIrms Jitter and 0.98-1.06 mW/GHz in 65-nm CMOS., и . IEEE Trans. Circuits Syst. II Express Briefs, 69 (9): 3714-3718 (2022)The Surprising Effectiveness of Diffusion Models for Optical Flow and Monocular Depth Estimation., , , , , , и . CoRR, (2023)Architectural & circuit level techniques to improve energy efficiency of high speed serial links. University of Illinois Urbana-Champaign, USA, (2015)A Class-C Injection-Locked Tripler with 48 dB Sub-Harmonic Suppression and 15 fs Additive RMS Jitter in 0.13μm BiCMOS Process., , , , и . ISCAS, стр. 2740-2744. IEEE, (2022)