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A parallel VLSI architecture of singular value decomposition processor for real-time multi-channel EEG system.

, , , и . ISCE, стр. 21-22. IEEE, (2013)

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Kuan-Tsae Huang

Yi-Ju Huang

Chang-Ju Huang-Tzeng

Pei Kuang

Kuan Tong

 

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A parallel VLSI architecture of singular value decomposition processor for real-time multi-channel EEG system., , , и . ISCE, стр. 21-22. IEEE, (2013)An effective chip implementation of a real-time eight-channel EEG signal processor based on on-line recursive ICA algorithm., , , , , и . BioCAS, стр. 192-195. IEEE, (2012)A VLSI design of singular value decomposition processor used in real-time ICA computation for multi-channel EEG system., , , и . ISCAS, стр. 413-416. IEEE, (2013)An efficient VLSI implementation of SVD processor of on-line recursive ICA for real-time EEG system., , , , и . BioCAS, стр. 73-76. IEEE, (2014)A pipeline VLSI design of fast singular value decomposition processor for real-time EEG system based on on-line recursive independent component analysis., , , , и . EMBC, стр. 1944-1947. IEEE, (2013)An online recursive ICA based real-time multichannel EEG system on chip design with automatic eye blink artifact rejection., , , и . VLSI-DAT, стр. 1-4. IEEE, (2013)A real-time processing flow for ICA based EEG acquisition system with eye blink artifact elimination., , , , , , и . SiPS, стр. 237-240. IEEE, (2013)An efficient ASIC implementation of 16-channel on-line recursive ICA processor for real-time EEG system., , , , , и . EMBC, стр. 3849-3852. IEEE, (2014)An efficient VLSI implementation of on-line recursive ICA processor for real-time multi-channel EEG signal separation., , , , , и . EMBC, стр. 6808-6811. IEEE, (2013)