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An energy-efficient parallel VLSI architecture for SVM classification.

Y. Xu, Z. Chen, X. Xiang, and J. Meng. IEICE Electron. Express, 15 (7): 20180099 (2018)

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Xiaoyan Jiang

Xiaoyan Jia

Xiaoyan Li

Xiaoyan Liu

Xiaoyan Wang

Other publications of authors with the same name

An adaptive block-set based management for large-scale flash memory.Z. Liu, L. Yue, P. Wei, P. Jin, and X. Xiang. SAC, page 1621-1625. ACM, (2009)Eliminating Timing Errors Through Collaborative Design to Maximize the Throughput.Z. Li, T. Zhu, Z. Chen, J. Meng, X. Xiang, and X. Yan. IEEE Trans. Very Large Scale Integr. Syst., 25 (2): 670-682 (2017)A Highly Adaptive Lossless ECG Compression ASIC for Wireless Sensors Based on Hybrid Gomlomb Coding.J. Luo, Z. Chen, X. Xiang, and J. Meng. IEICE Trans. Inf. Syst., 101-D (3): 791-794 (2018)Light-weight one-cycle timing error correction based on hardware software co-design.L. Zhanhui, Y. Ding, X. Yan, J. Meng, and X. Xiang. IEICE Electron. Express, 13 (11): 20160411 (2016)A Dedicated Greedy Short Path Padding Solution Method for Error Resilient Circuit Designs.Y. He, Z. Chen, X. Xiang, and T. Zhu. IEEE Access, (2020)High Noise Tolerant R-Peak Detection Method Based on Deep Convolution Neural Network.M. Jia, F. Li, Z. Chen, X. Xiang, and X. Yan. IEICE Trans. Inf. Syst., 102-D (11): 2272-2275 (2019)Xuantie-910: Innovating Cloud and Edge Computing by RISC-V.C. Chen, X. Xiang, C. Liu, Y. Shang, R. Guo, D. Liu, Y. Lu, Z. Hao, J. Luo, Z. Chen and 6 other author(s). Hot Chips Symposium, page 1-19. IEEE, (2020)A lifting wavelet based lossless and lossy ECG compression processor for wireless sensors.J. Luo, Z. Chen, X. Xiang, and J. Meng. IEICE Electron. Express, 14 (20): 20170865 (2017)An energy-efficient parallel VLSI architecture for SVM classification.Y. Xu, Z. Chen, X. Xiang, and J. Meng. IEICE Electron. Express, 15 (7): 20180099 (2018)SCSE: Boosting Symbolic Execution via State Concretization.H. Wang, C. Li, J. Meng, and X. Xiang. IEICE Trans. Inf. Syst., 102-D (8): 1506-1516 (2019)

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Disambiguation of "Xiang, Xiaoyan"

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An energy-efficient parallel VLSI architecture for SVM classification.

Please choose a person to relate this publication to

Xiaoyan Jiang

Xiaoyan Jia

Xiaoyan Li

Xiaoyan Liu

Xiaoyan Wang

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Xiang, Xiaoyan"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML An energy-efficient parallel VLSI architecture for SVM classification.

Please choose a person to relate this publication to

Xiaoyan Jiang

Xiaoyan Jia

Xiaoyan Li

Xiaoyan Liu

Xiaoyan Wang

Other publications of authors with the same name

Disambiguation

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history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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An energy-efficient parallel VLSI architecture for SVM classification.