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Parallelization of scalable elliptic curve cryptosystem processors in GF(2m)., and . Microprocess. Microsystems, (2016)Stride 2 1-D, 2-D, and 3-D Winograd for Convolutional Neural Networks., and . IEEE Trans. Very Large Scale Integr. Syst., 28 (4): 853-863 (2020)Capsule GAN for robust face super resolution., and . Multim. Tools Appl., 79 (41-42): 31205-31218 (2020)Improved Hybrid Memory Cube for Weight-Sharing Deep Convolutional Neural Networks., , and . AICAS, page 122-126. IEEE, (2019)SaHNoC: an optimal energy efficient hybrid networks-on-chip architecture., , , and . J. Supercomput., 79 (6): 6538-6559 (April 2023)Booth Encoding-Based Energy Efficient Multipliers for Deep Learning Systems., and . IEEE Trans. Circuits Syst. II Express Briefs, 70 (6): 2241-2245 (June 2023)Hybrid Architecture and VLSI Implementation of the Cosine-Fourier-Haar Transforms., , , , and . Circuits Syst. Signal Process., 29 (6): 1193-1205 (2010)A Real-Time Architecture for Pruning the Effectual Computations in Deep Neural Networks., , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 68 (5): 2030-2041 (2021)Reliable SRAM using NAND-NOR Gate in beyond-CMOS QCA technology., , and . IET Comput. Digit. Tech., 15 (3): 202-213 (2021)Decimal floating-point fused multiply-add with redundant internal encodings., , and . IET Comput. Digit. Tech., 10 (4): 147-156 (2016)