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Extended dynamic voltage scaling for low power design., , , and . SoCC, page 389-394. IEEE, (2004)CAS-FEST 2010: Mitigating Variability in Near-Threshold Computing., , , , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 1 (1): 42-49 (2011)Robust Clock Network Design Methodology for Ultra-Low Voltage Operations., , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 1 (2): 120-130 (2011)Simultaneous extraction of effective gate length and low-field mobility in non-uniform devices., , and . ISQED, page 158-162. IEEE, (2010)Better-than-voltage scaling energy reduction in approximate SRAMs via bit dropping and bit reuse., , , and . PATMOS, page 132-139. IEEE, (2015)A black box method for stability analysis of arbitrary SRAM cell structures., , , , , , and . DATE, page 795-800. IEEE Computer Society, (2010)A start-up boosting circuit with 133× speed gain for 2-transistor voltage reference., , , , , and . CICC, page 1-4. IEEE, (2017)Analyzing the impact of Double Patterning Lithography on SRAM variability in 45nm CMOS., , , , and . CICC, page 1-4. IEEE, (2010)Robust ultra-low voltage ROM design., , , , and . CICC, page 423-426. IEEE, (2008)Pulse amplification based dynamic synchronizers with metastability measurement using capacitance de-rating., , , , and . CICC, page 1-4. IEEE, (2013)