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A 16-nm SoC for Noise-Robust Speech and NLP Edge AI Inference With Bayesian Sound Source Separation and Attention-Based DNNs., , , , , , , , , and . IEEE J. Solid State Circuits, 58 (2): 569-581 (February 2023)A case for efficient accelerator design space exploration via Bayesian optimization., , , , , , and . ISLPED, page 1-6. IEEE, (2017)The HELIX project: overview and directions., , , , and . DAC, page 277-282. ACM, (2012)Evaluation of voltage stacking for near-threshold multicore computing., , and . ISLPED, page 373-378. ACM, (2012)Towards a software approach to mitigate voltage emergencies., , , , and . ISLPED, page 123-128. ACM, (2007)Network Pruning for Low-Rank Binary Indexing., , , , and . CoRR, (2019)Structured Compression by Unstructured Pruning for Sparse Quantized Neural Networks., , , , , and . CoRR, (2019)SMAUG: End-to-End Full-Stack Simulation Infrastructure for Deep Learning Workloads., , , , , and . ACM Trans. Archit. Code Optim., 17 (4): 39:1-39:26 (2020)Supply-noise resilient adaptive clocking for battery-powered aerial microrobotic System-on-Chip in 40nm CMOS., , , and . CICC, page 1-4. IEEE, (2013)Digital wireline and PLL techniques., and . CICC, IEEE, (2009)