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Power delivery network design and optimization for 3D stacked die designs., , , , , and . 3DIC, page 1-6. IEEE, (2010)Instruction Prediction for Step Power Reduction., , , , , and . ISQED, page 211-216. IEEE Computer Society, (2001)Effective on-chip inductance modeling for multiple signal lines and application to repeater insertion., , , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 10 (6): 799-805 (2002)Intelligent Ecological Environment Control System Design., and . ICAIS (1), volume 12736 of Lecture Notes in Computer Science, page 738-748. Springer, (2021)Clocktree RLC Extraction with Efficient Inductance Modeling., , , , and . DATE, page 522-526. IEEE Computer Society / ACM, (2000)Rectilinear block packing using O-tree representation., , , and . ISPD, page 156-161. ACM, (2001)Ramp Up/Down Functional Unit to Reduce Step Power., , , , , and . PACS, volume 2008 of Lecture Notes in Computer Science, page 13-24. Springer, (2000)Effective On-chip Inductance Modeling for Multiple Signal Lines and Application on Repeater Insertion., , , , , , and . ISQED, page 185-190. IEEE Computer Society, (2001)Full Chip Thermal Simulation., , , , , , and . ISQED, page 145-150. IEEE Computer Society, (2000)