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Design and Synthesis of Synchronization Skeletons Using Branching-Time Temporal Logic., and . Logic of Programs, volume 131 of Lecture Notes in Computer Science, page 52-71. Springer, (1981)Verification of SpecC using predicate abstraction., , and . Formal Methods Syst. Des., 30 (1): 5-28 (2007)Distributed Computing Issues in Hardware Design.. Distributed Comput., 1 (4): 185-186 (1986)Another Look at LTL Model Checking., , and . Formal Methods Syst. Des., 10 (1): 47-71 (1997)Efficient Craig interpolation for linear Diophantine (dis)equations and linear modular equations., , and . Formal Methods Syst. Des., 35 (1): 6-39 (2009)Functional Equivalence Verification Tools in High-Level Synthesis Flows., , , and . IEEE Des. Test Comput., 26 (4): 88-95 (2009)Statistical Verification of Probabilistic Properties with Unbounded Until., , and . SBMF, volume 6527 of Lecture Notes in Computer Science, page 144-160. Springer, (2010)Word Level Model Checking - Avoiding the Pentium FDIV Error., , and . DAC, page 645-648. ACM Press, (1996)Verification of All Circuits in a Floating-Point Unit Using Word-Level Model Checking., , , , , , , and . FMCAD, volume 1166 of Lecture Notes in Computer Science, page 19-33. Springer, (1996)Verification of the Futurebus+ Cache Coherence Protocol., , , , , , and . CHDL, volume A-32 of IFIP Transactions, page 15-30. North-Holland, (1993)