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Low-Complexity Adaptive Encoding Schemes Based on Partial Bus-Invert for Power Reduction in Buses Exhibiting Capacitive Coupling.

, , , , and . ReCoSoC, page 7-14. Univ. Montpellier II, (2007)

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Comparison of Opamp-Based and Comparator-Based Delta-Sigma Modulation., , and . DATE, page 688-693. ACM, (2008)An Analog On-Chip Adaptive Body Bias Calibration for Reducing Mismatches in Transistor Pairs., , , and . DATE, page 698-703. ACM, (2008)Low-Complexity Adaptive Encoding Schemes Based on Partial Bus-Invert for Power Reduction in Buses Exhibiting Capacitive Coupling., , , , and . ReCoSoC, page 7-14. Univ. Montpellier II, (2007)Simultaneous Placement and Buffer Planning for Reduction of Power Consumption in Interconnects and Repeaters., , , , and . VLSI-SoC, page 302-307. IEEE, (2006)A Multistep Extrapolated S-Parameter Model for Arbitrary On-Chip Interconnect Structures., and . VLSI-SoC, volume 360 of IFIP Advances in Information and Communication Technology, page 156-180. Springer, (2009)Partial Bus-Invert Bus Encoding Schemes for Low-Power DSP Systems Considering Inter-wire Capacitance., , , and . PATMOS, volume 4148 of Lecture Notes in Computer Science, page 169-180. Springer, (2006)On the Necessity of Combining Coding with Spacing and Shielding for Improving Performance and Power in Very Deep Sub-micron Interconnects., , , , and . PATMOS, volume 4644 of Lecture Notes in Computer Science, page 242-254. Springer, (2007)