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Disambiguation of "Krishna, Tushar"

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Evaluating Spatial Accelerator Architectures with Tiled Matrix-Matrix Multiplication.

, , , , , and . IEEE Trans. Parallel Distributed Syst., 33 (4): 1002-1014 (2022)

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Tushar Krishna

Tushar Khandeparkar

Tushar Chaudhuri

Tushar Gosavi

Tushar Chatterjee

 

Other publications of authors with the same name

Merge Network for a Non-Von Neumann Accumulate Accelerator in a 3D Chip., , , and . ICRC, page 1-11. IEEE, (2018)ASTRA-SIM: Enabling SW/HW Co-Design Exploration for Distributed DL Training Platforms., , , and . ISPASS, page 81-92. IEEE, (2020)The gem5 Simulator: Version 20.0+., , , , , , , , , and 63 other author(s). CoRR, (2020)STIFT: A Spatio-Temporal Integrated Folding Tree for Efficient Reductions in Flexible DNN Accelerators., , , and . ACM J. Emerg. Technol. Comput. Syst., 19 (4): 32:1-32:20 (October 2023)ATTACC the Quadratic Bottleneck of Attention Layers., , , and . CoRR, (2021)Exploring Multi-dimensional Hierarchical Network Topologies for Efficient Distributed Training of Trillion Parameter DL Models., , , and . CoRR, (2021)Evaluating Spatial Accelerator Architectures with Tiled Matrix-Matrix Multiplication., , , , , and . IEEE Trans. Parallel Distributed Syst., 33 (4): 1002-1014 (2022)Co-Exploration of Neural Architectures and Heterogeneous ASIC Accelerator Designs Targeting Multiple Tasks., , , , , , , , and . DAC, page 1-6. IEEE, (2020)SWAP: Synchronized Weaving of Adjacent Packets for Network Deadlock Resolution., , , , and . MICRO, page 873-885. ACM, (2019)Pitstop: Enabling a Virtual Network Free Network-on-Chip., , , , , , and . HPCA, page 682-695. IEEE, (2021)