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Hybrid optimization/heuristic instruction scheduling for programmable accelerator codesign.

, , , and . PACT, page 36:1-36:15. ACM, (2018)

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DySER: Unifying Functionality and Parallelism Specialization for Energy-Efficient Computing., , , , , , and . IEEE Micro, 32 (5): 38-51 (2012)Accelerating the Accelerator Memory Interface with Access-Execute and Dataflow., , and . IEEE Micro, 36 (3): 31-41 (2016)Near-Memory Data Services., , , , , , , , , and 1 other author(s). IEEE Micro, 36 (1): 6-13 (2016)Dynamic hardware specialization-using moore's bounty without burning the chip down.. CASES, page 17:1. IEEE, (2013)Design and implementation of the PLUG architecture for programmable and efficient network lookups., , , , , , and . PACT, page 331-342. ACM, (2010)Idempotent code generation: Implementation, analysis, and evaluation., and . CGO, page 27:1-27:12. IEEE Computer Society, (2013)Analyzing Behavior Specialized Acceleration., and . ASPLOS, page 697-711. ACM, (2016)Dynamically Specialized Datapaths for energy efficient computing., , and . HPCA, page 503-514. IEEE Computer Society, (2011)Experiences in Co-designing a Packet Classification Algorithm and a Flexible Hardware Platform., , , , and . ANCS, page 189-199. IEEE Computer Society, (2011)Implementing Signatures for Transactional Memory., , , and . MICRO, page 123-133. IEEE Computer Society, (2007)