Author of the publication

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A Low Power Reconfigurable Memory Architecture for Complementary Resistive Switches.

B. Wu, D. Feng, W. Tong, J. Liu, C. Wang, W. Zhao, and Y. Zhang. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 39 (9): 1806-1819 (2020)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Wang Wang

Linfang Wang

Investigation of the functions of 53BP1 in DNA demethylationL. Wang. Uni Marburg, (2009)

Qi Wang

Shifeng Wang

Li Wang

Other publications of authors with the same name

Cross-point Resistive Memory: Nonideal Properties and Solutions.C. Wang, D. Feng, W. Tong, J. Liu, Z. Li, J. Chang, Y. Zhang, B. Wu, J. Xu, W. Zhao and 2 other author(s). ACM Trans. Design Autom. Electr. Syst., 24 (4): 46:1-46:37 (2019)ICON: An IR Drop Compensation Method at OU Granularity with Low Overhead for eNVM-based Accelerators.J. Liu, W. Tong, B. Wu, H. Cheng, and C. Wang. ICCD, page 102-109. IEEE, (2023)APPcache+: An STT-MRAM-Based Approximate Cache System With Low Power and Long Lifetime.W. Zhao, D. Feng, W. Tong, J. Liu, Z. Chen, B. Wu, and C. Wang. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 42 (11): 3840-3853 (November 2023)Space-Time-Efficient Modeling of Large-Scale 3-D Cross-Point Memory Arrays by Operation Adaption and Network Compaction.C. Wang, D. Feng, W. Tong, J. Liu, B. Wu, and Y. Chen. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 41 (10): 3479-3491 (2022)EnTiered-ReRAM: An Enhanced Low Latency and Energy Efficient TLC Crossbar ReRAM Architecture.Y. Zhang, Z. Yu, L. Gu, C. Wang, and D. Feng. IEEE Access, (2021)Improving Multilevel Writes on Vertical 3-D Cross-Point Resistive Memory.C. Wang, D. Feng, W. Tong, Y. Hua, J. Liu, B. Wu, W. Zhao, L. Song, Y. Zhang, J. Xu and 2 other author(s). IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 40 (4): 762-775 (2021)Aliens: a novel hybrid architecture for resistive random-access memory.B. Wu, D. Feng, W. Tong, J. Liu, S. Li, M. Yang, C. Wang, and Y. Zhang. ICCAD, page 54. ACM, (2018)A Low Power Reconfigurable Memory Architecture for Complementary Resistive Switches.B. Wu, D. Feng, W. Tong, J. Liu, C. Wang, W. Zhao, and Y. Zhang. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 39 (9): 1806-1819 (2020)A Low-Latency and High-Endurance MLC STT-MRAM-Based Cache System.W. Zhao, J. Xu, X. Wei, B. Wu, C. Wang, W. Zhu, W. Tong, D. Feng, and J. Liu. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 42 (1): 122-135 (2023)CACF: A Novel Circuit Architecture Co-optimization Framework for Improving Performance, Reliability and Energy of ReRAM-based Main Memory System.Y. Zhang, D. Feng, W. Tong, Y. Hua, J. Liu, Z. Tan, C. Wang, B. Wu, Z. Li, and G. Xu. ACM Trans. Archit. Code Optim., 15 (2): 22:1-22:26 (2018)

BibSonomy

Disambiguation of "Wang, Chengning"

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A Low Power Reconfigurable Memory Architecture for Complementary Resistive Switches.

Please choose a person to relate this publication to

Wang Wang

Linfang Wang

Qi Wang

Shifeng Wang

Li Wang

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Wang, Chengning"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A Low Power Reconfigurable Memory Architecture for Complementary Resistive Switches.

Please choose a person to relate this publication to

Wang Wang

Linfang Wang

Qi Wang

Shifeng Wang

Li Wang

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A Low Power Reconfigurable Memory Architecture for Complementary Resistive Switches.