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A 25-Gb/s high-sensitivity transimpedance amplifier with bandwidth enhancement.

, , , and . IEICE Electron. Express, 17 (23): 20200340 (2020)

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Rearranging the Iteration Space to Eliminate the True Sharing Thrashing in Parallel Processinng Systems., , and . PPSC, page 692-697. SIAM, (1995)Processor self-scheduling for parallel loops in preemptive environments., , , , and . Future Gener. Comput. Syst., 6 (1): 97-103 (1990)Effect of PSO Communication Topologies on Task Matching in Grid Computing., , , and . CEC, page 426-433. IEEE, (2019)Loop Staggering Loop Staggering and Compacting: Restructuring Techniques for Thrashing Problem., , and . ICPP (1), page 678-679. CRC Press, (1991)Loop Restructuring Techniques For Thrashing Problem., and . PARLE, volume 605 of Lecture Notes in Computer Science, page 465-480. Springer, (1992)Loop staggering, loop compacting: Restructuring techniques for thrashing problem., , and . J. Comput. Sci. Technol., 8 (1): 49-57 (1993)On the problem of optimizing parallel programs for complex memory hierarchies., and . J. Comput. Sci. Technol., 9 (1): 1-26 (1994)A 25-Gb/s high-sensitivity transimpedance amplifier with bandwidth enhancement., , , and . IEICE Electron. Express, 17 (23): 20200340 (2020)Hybrid Loop Interchange: Optimization for Parallel Programs., and . IPPS, page 680-685. IEEE Computer Society, (1992)A theoretical foundation for program transformations to reduce cache thrashing due to true data sharing., , and . Theor. Comput. Sci., 255 (1-2): 449-481 (2001)