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The Dawn of AI-Native EDA: Promises and Challenges of Large Circuit Models.

L. Chen, Y. Chen, Z. Chu, W. Fang, T. Ho, Y. Huang, S. Khan, M. Li, X. Li, Y. Liang, Y. Lin, J. Liu, Y. Liu, G. Luo, Z. Shi, G. Sun, D. Tsaras, R. Wang, Z. Wang, X. Wei, Z. Xie, Q. Xu, C. Xue, E. Young, B. Yu, M. Yuan, H. Zhang, Z. Zhang, Y. Zhao, H. Zhen, Z. Zheng, B. Zhu, K. Zhu, and S. Zou. CoRR, (2024)

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Liang Liang

Liang-Liang Fu

Bettina Yunis

Jong-Mo Yun

Jaeman Yun

Other publications of authors with the same name

Zac: Towards Automatic Optimization and Deployment of Quantized Deep Neural Networks on Embedded Devices.Q. Xiao, and Y. Liang. ICCAD, page 1-6. ACM, (2019)An efficient compiler framework for cache bypassing on GPUs.X. Xie, Y. Liang, G. Sun, and D. Chen. ICCAD, page 516-523. IEEE, (2013)Systolic Computing on GPUs for Productive Performance.H. Rong, X. Hao, Y. Liang, L. Xu, H. Jiang, and P. Dubey. CoRR, (2020)Interactive thyroid whole slide image diagnostic system using deep representation.P. Chen, X. Shi, Y. Liang, Y. Li, L. Yang, and P. Gader. Comput. Methods Programs Biomed., (2020)An Accurate GPU Performance Model for Effective Control Flow Divergence Optimization.Y. Liang, M. Satria, K. Rupnow, and D. Chen. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 35 (7): 1165-1178 (2016)Scale-Free Sparse Matrix-Vector Multiplication on Many-Core Architectures.Y. Liang, W. Tang, R. Zhao, M. Lu, H. Huynh, and R. Goh. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 36 (12): 2106-2119 (2017)Performance-centric register file design for GPUs using racetrack memory.S. Wang, Y. Liang, C. Zhang, X. Xie, G. Sun, Y. Liu, Y. Wang, and X. Li. ASP-DAC, page 25-30. IEEE, (2016)Proteus: Simulating the Performance of Distributed DNN Training.J. Duan, X. Li, P. Xu, X. Zhang, S. Yan, Y. Liang, and D. Lin. CoRR, (2023)EventFormer: AU Event Transformer for Facial Action Unit Event Detection.Y. Chen, J. Zhang, D. Chen, T. Wang, Y. Wang, and Y. Liang. CoRR, (2022)Action-Constrained Reinforcement Learning for Frame-Level Bit Allocation in HEVC/H.265 through Frank-Wolfe Policy Optimization.Y. Ho, Y. Liang, C. Kao, and W. Peng. CoRR, (2022)

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Disambiguation of "Liang, Yun"

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The Dawn of AI-Native EDA: Promises and Challenges of Large Circuit Models.

Please choose a person to relate this publication to

Liang Liang

Liang-Liang Fu

Bettina Yunis

Jong-Mo Yun

Jaeman Yun

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Liang, Yun"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML The Dawn of AI-Native EDA: Promises and Challenges of Large Circuit Models.

Please choose a person to relate this publication to

Liang Liang

Liang-Liang Fu

Bettina Yunis

Jong-Mo Yun

Jaeman Yun

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
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history of this post
URL
DOI
BibTeX
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APA
Chicago
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The Dawn of AI-Native EDA: Promises and Challenges of Large Circuit Models.