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A configurable dual moduli multi-operand modulo adder., , , and . ISCAS (2), page 1630-1633. IEEE, (2005)Framework for Rapid Performance Estimation of Embedded Soft Core Processors., , , and . ACM Trans. Reconfigurable Technol. Syst., 11 (2): 9:1-9:21 (2018)Exploiting FPGA-Aware Merging of Custom Instructions for Runtime Reconfiguration., , and . ACM Trans. Reconfigurable Technol. Syst., 7 (3): 26:1-26:15 (2014)A linear approximation based hybrid approach for binary logarithmic conversion., and . Microprocess. Microsystems, 26 (8): 353-361 (2002)A Modular Simulator Framework for Network-on-Chip Based Manycore Chips Using UNISIM., , and . Trans. High Perform. Embed. Archit. Compil., (2011)Efficient heuristic and tabu search for hardware/software partitioning., , , and . J. Supercomput., 66 (1): 118-134 (2013)Memory-access aware work-load distribution for peak-temperature reduction of 3D multi-core embedded systems., , , and . DSP, page 1270-1273. IEEE, (2015)Custom instructions with local memory elements without expensive DMA transfers., , and . FPL, page 647-650. IEEE, (2012)Exploiting FPGA-aware merging of custom instructions for runtime reconfiguration., , and . ReCoSoC, page 1-8. IEEE, (2012)An OLE-based speech compression system for multimedia applications., , and . Microprocess. Microsystems, 22 (1): 41-48 (1998)