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Disambiguation of "Wong, Martin D. F."

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Performance-driven channel pin assignment algorithms.

, , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 14 (7): 849-857 (1995)

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Alexander D F Lahmann

Blaise F D Bourgeois

Walter Wong

Martin F Almstetter

Martin F Polaschek

 

Other publications of authors with the same name

Layout Decomposition for Multiple Patterning., and . Encyclopedia of Algorithms, (2016)Circuit Partitioning: A Network-Flow-Based Balanced Min-Cut Approach., and . Encyclopedia of Algorithms, Springer, (2008)Circuit clustering for delay minimization under area and pin constraints., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 16 (9): 976-986 (1997)Dummy-feature placement for chemical-mechanical polishinguniformity in a shallow-trench isolation process., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 21 (1): 63-71 (2002)On shifting blocks and terminals to minimize channel density., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 13 (2): 178-186 (1994)Fast Dummy-Fill Density Analysis With Coupling Constraints., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 27 (4): 633-642 (2008)Maze routing with buffer insertion and wiresizing., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 21 (10): 1205-1209 (2002)Wire-sizing optimization with inductance consideration using transmission-line model., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 18 (12): 1759-1767 (1999)GAMER: GPU-Accelerated Maze Routing., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 42 (2): 583-593 (February 2023)PolyPUF: Physically Secure Self-Divergence., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 35 (7): 1053-1066 (2016)