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An integrated platform for differential electrochemical and ISFET sensing., , , and . ISCAS, page 2875-2878. IEEE, (2016)Synthesis of low-power selectively-clocked systems from high-level specification., and . ACM Trans. Design Autom. Electr. Syst., 5 (3): 311-321 (2000)A Full-Capacity Local RoutingArchitecture for FPGAs (Abstract Only)., , and . FPGA, page 281. ACM, (2016)Optimization of Reliability and Power Consumption in Systems on a Chip., , and . PATMOS, volume 3728 of Lecture Notes in Computer Science, page 237-246. Springer, (2005)A Study on the Programming Structures for RRAM-Based FPGA Architectures., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 63-I (4): 503-516 (2016)Analysis and Optimization of MPSoC Reliability., , , , and . J. Low Power Electron., 2 (1): 56-69 (2006)Inter-Plane Communication Methods for 3-D ICs., , and . J. Low Power Electron., 8 (2): 170-181 (2012)Saving Power by Synthesizing Gated Clocks for Sequential Circuits., , and . IEEE Des. Test Comput., 11 (4): 32-41 (1994)Configurable Circuits Featuring Dual-Threshold-Voltage Design With Three-Independent-Gate Silicon Nanowire FETs., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 61-I (10): 2851-2861 (2014)Reversible Pebble Games for Reducing Qubits in Hierarchical Quantum Circuit Synthesis., , , , and . ISMVL, page 102-107. IEEE, (2019)