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Ultra-Low Power Read-Decoupled SRAMs with Ultra-Low Write-Bitline Voltage Swing., , and . Circuits Syst. Signal Process., 33 (10): 3317-3329 (2014)Double cell upsets mitigation through triple modular redundancy., , , , , and . Microelectron. J., (2020)A learning scheme by sparse grids and Picard approximations for semilinear parabolic PDEs., , , and . CoRR, (2021)A Methodology for Identifying Critical Sequential Circuits with Graph Convolutional Networks., , , and . ISVLSI, page 20-25. IEEE, (2022)Machine Learning Approach for Accelerating Simulation-based Fault Injection., , , , , and . NorCAS, page 1-6. IEEE, (2021)Adaptive Lock-Step System for Resilient Multiprocessing Architectures., , , , and . NorCAS, page 1-6. IEEE, (2023)Hardware Accelerator Design with Supervised Machine Learning for Solar Particle Event Prediction., , , , and . DFT, page 1-6. IEEE, (2020)Design of SRAM-Based Low-Cost SEU Monitor for Self-Adaptive Multiprocessing Systems., , , , , and . DSD, page 514-521. IEEE, (2019)A design concept for radiation hardened RADFET readout system for space applications., , , , , , , , , and 4 other author(s). Microprocess. Microsystems, (April 2022)Toward Critical Flip-Flop Identification for Soft-Error Tolerance With Graph Neural Networks., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 43 (4): 1135-1148 (April 2024)