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Disambiguation of "Lu, Shyue-Kung"

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Open Defect Detection with a Built-in Test Circuit by IDDT Appearance Time in CMOS ICs.

, , , , and . ATS, page 242-247. IEEE Computer Society, (2017)

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Lu Lu

Zigmas Kungys

Hans Kungl

Angela Brigitte Kung

Erhard Küng

 

Other publications of authors with the same name

A built-in supply current test circuit for electrical interconnect tests of 3D ICs., , , and . 3DIC, page 1-6. IEEE, (2014)Efficient test and repair architectures for 3D TSV-based random access memories., , , and . VLSI-DAT, page 1-4. IEEE, (2013)Hybrid scrambling technique for increasing the fabrication yield of NROM-Based ROMs., , , and . VLSI-DAT, page 1-4. IEEE, (2015)Combinational circuit fault diagnosis using logic emulation., , , , and . ISCAS (5), page 549-552. IEEE, (2003)Fault-Aware Dependability Enhancement Techniques for Flash Memories., , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 28 (3): 634-645 (2020)A Built-in Test Circuit for Electrical Interconnect Testing of Open Defects in Assembled PCBs., , , , , , and . IEICE Trans. Inf. Syst., 99-D (11): 2723-2733 (2016)Defect Level Prediction Using Multi-Model Fault Coverage.. IEICE Trans. Inf. Syst., 87-D (6): 1488-1495 (2004)A Design for Testability of Open Defects at Interconnects in 3D Stacked ICs., , , , and . IEICE Trans. Inf. Syst., 101-D (8): 2053-2063 (2018)Efficient Double Fault Diagnosis for CMOS Logic Circuits With a Specific Application to Generic Bridging Faults., , , , , and . J. Inf. Sci. Eng., 19 (4): 571-587 (2003)Fault-Aware Dependability Enhancement Techniques for Phase Change Memory., , , , and . J. Electron. Test., 37 (4): 503-513 (2021)