( en | de | ru )

 

Disambiguation

From post

копироватьудалитьдобавить публикацию в буфер
Development of LED illumination-based spy photo-prevention system.

, , , и . GCCE, стр. 129-130. IEEE, (2015)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

Takeshi Morita

Takeshi Morita

Takeshi Imamura

Takeshi Omori

Takeshi Yasui

 

Другие публикации лиц с тем же именем

Acceleration of DCT Processing with Massive-Parallel Memory-Embedded SIMD Matrix Processor., , , , , , , , и . IEICE Trans. Inf. Syst., 90-D (8): 1312-1315 (2007)Real-Time Huffman Encoder with Pipelined CAM-Based Data Path and Code-Word-Table Optimizer., , , , , , , , и . IEICE Trans. Inf. Syst., 90-D (1): 334-345 (2007)Cipher-destroying and secret-key-emitting hardware Trojan against AES core., , и . MWSCAS, стр. 408-411. IEEE, (2013)Development of effective information-hiding method for embedded systems., , , , и . MWSCAS, стр. 1298-1301. IEEE, (2013)A scalable massively parallel processor for real-time image processing., , , , , , , , , и 3 other автор(ы). ISSCC, стр. 334-335. IEEE, (2010)Evaluation of advanced pixel-level snakes on cellular hardware platform., , , , , и . NEWCAS, стр. 1-4. IEEE, (2013)Efficient Vertical/Horizontal-Space 1D-DCT Processing Based on Massive-Parallel Matrix-Processing Engine., , , , , , , и . ISCAS, стр. 525-528. IEEE, (2007)CAM-based VLSI architecture for Huffman coding with real-time optimization of the code word table image coding example., , , , , , , и . ISCAS (5), стр. 5202-5205. IEEE, (2005)Software-Based Parallel Cryptographic Solution with Massive-Parallel Memory-Embedded SIMD Matrix Architecture for Data-Storage Systems., , , , и . IEICE Trans. Inf. Syst., 94-D (9): 1742-1754 (2011)Scalable FPGA/ASIC Implementation Architecture for Parallel Table-Lookup-Coding Using Multi-Ported Content Addressable Memory., , , , и . IEICE Trans. Inf. Syst., 90-D (1): 346-354 (2007)