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A Method for I/O Pins Partitioning Targeting 3D VLSI Circuits., , , and . VLSI-SoC (Selected Papers), volume 249 of IFIP, page 259-279. Springer, (2006)Rsyn: An Extensible Physical Synthesis Framework., , , , and . ISPD, page 33-40. ACM, (2017)Effective Method for Simultaneous Gate Sizing and $V$ th Assignment Using Lagrangian Relaxation., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 33 (4): 546-557 (2014)A polyphonic pitch tracking embedded system for rapid instrument augmentation., , , and . NIME, page 120-125. nime.org, (2018)An Incremental Timing-Driven flow using quadratic formulation for detailed placement., , , , , , and . VLSI-SoC, page 1-6. IEEE, (2015)Ecologically grounded multimodal design: The Palafito 1.0 study., , , , , , , , and . ICMC, Michigan Publishing, (2014)A Mesh-Buffer Displacement Optimization Strategy., , , and . ISVLSI, page 282-287. IEEE Computer Society, (2010)Interaction Aesthetics and Ubiquitous Music., , , , , , and . Creativity in the Digital Age, Springer, (2015)Quadratic placement with single-iteration linear system solver., , and . SBCCI, page 109-112. ACM, (2011)Unbalacing the I/O Pins Partitioning for Minimizing Inter-Tier Vias in 3D VLSI Circuits., , , and . ICECS, page 399-402. IEEE, (2006)