( en | de | ru )

 

Disambiguation of "Karandikar, Sagar"

Author of the publication

copydeleteadd this publication to your clipboard
FireSim: FPGA-Accelerated Cycle-Exact Scale-Out System Simulation in the Public Cloud.

, , , , , , , , , , , , , , , and . IEEE Micro, 39 (3): 56-65 (2019)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Vidya Sagar

Anubha Sagar

Pramod Sagar

Sagar Bhayana

Sagar Sen

 

Other publications of authors with the same name

FireSim: FPGA-Accelerated Cycle-Exact Scale-Out System Simulation in the Public Cloud., , , , , , , , , and 6 other author(s). IEEE Micro, 39 (3): 56-65 (2019)Chipyard: Integrated Design, Simulation, and Implementation Framework for Custom SoCs., , , , , , , , , and 7 other author(s). IEEE Micro, 40 (4): 10-21 (2020)Invited: Chipyard - An Integrated SoC Research and Implementation Environment., , , , , , , , , and 8 other author(s). DAC, page 1-6. IEEE, (2020)Profiling Hyperscale Big Data Processing., , , , , , , , and . ISCA, page 47:1-47:16. ACM, (2023)Centrifuge: Evaluating full-system HLS-generated heterogenous-accelerator SoCs using FPGA-Acceleration., , , , , , , , , and . ICCAD, page 1-8. ACM, (2019)BOSS: Building Operating System Services., , , , , , and . NSDI, page 443-457. USENIX Association, (2013)A Hardware Accelerator for Protocol Buffers., , , , , , , and . MICRO, page 462-478. ACM, (2021)COBRA: A Framework for Evaluating Compositions of Hardware Branch Predictors., , , , and . ISPASS, page 310-320. IEEE, (2021)FirePerf: FPGA-Accelerated Full-System Hardware/Software Performance Profiling and Co-Design., , , , , , and . ASPLOS, page 715-731. ACM, (2020)ASPLOS 2020 was canceled because of COVID-19..Vector Processors for Energy-Efficient Embedded Systems., , , , , and . MES@ISCA, page 10-16. ACM, (2016)