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Memory Efficient Multithreaded Incremental Segmented Sieve Algorithm., and . CoRR, (2023)MaxK-GNN: Towards Theoretical Speed Limits for Accelerating Graph Neural Networks Training., , , , , , , , and . CoRR, (2023)AXI4MLIR: User-Driven Automatic Host Code Generation for Custom AXI-Based Accelerators., , , , , , , , and . CoRR, (2023)Digital Computer Architecture.. The Computer Science and Engineering Handbook, CRC Press, (1997)Improving the Accuracy of History Based Branch Prediction., and . IEEE Trans. Computers, 46 (4): 469-472 (1997)Improving Multiprocessor Scalability Using Lockup Free Caches., , and . PDPTA, page 619-622. CSREA Press, (1996)Accelerating Finite Field Arithmetic for Homomorphic Encryption on GPUs., , , , , , , , and . IEEE Micro, 43 (5): 55-63 (September 2023)Exploiting temporal locality in drowsy cache policies., , , and . Conf. Computing Frontiers, page 371-377. ACM, (2005)Data Structures and Transformations for Physically Based Simulation on a GPU., , , , , and . VECPAR, volume 6449 of Lecture Notes in Computer Science, page 162-171. Springer, (2010)Architecture-Independent Dynamic Information Flow Tracking., , and . CC, volume 7791 of Lecture Notes in Computer Science, page 144-163. Springer, (2013)