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Analog/Mixed-Signal Circuit Verification Using Models Generated from Simulation Traces.

, , , , and . Int. J. Found. Comput. Sci., 21 (2): 191-210 (2010)

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Verification of timed circuits with failure-directed abstractions., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 25 (3): 403-412 (2006)Verification of Analog/Mixed-Signal Circuits Using Symbolic Methods., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 27 (12): 2223-2235 (2008)Property-Based Monitoring of Analog and Mixed-Signal Systems., , , and . FORMATS, volume 6246 of Lecture Notes in Computer Science, page 23-24. Springer, (2010)Bounded Model Checking of Analog and Mixed-Signal Circuits Using an SMT Solver., , and . ATVA, volume 4762 of Lecture Notes in Computer Science, page 66-81. Springer, (2007)Analog/Mixed-Signal Circuit Verification Using Models Generated from Simulation Traces., , , and . ATVA, volume 4762 of Lecture Notes in Computer Science, page 114-128. Springer, (2007)Synchronizing AMS Assertions with AMS Simulation: From Theory to Practice., , , , , and . ACM Trans. Design Autom. Electr. Syst., 17 (4): 38:1-38:25 (2012)The Case for Analog Circuit Verification., , , , and . FAC, volume 153 of Electronic Notes in Theoretical Computer Science, page 53-63. Elsevier, (2005)Verification of Analog and Mixed-Signal Circuits Using Timed Hybrid Petri Nets., , , , and . ATVA, volume 3299 of Lecture Notes in Computer Science, page 426-440. Springer, (2004)Verification of Analog/Mixed-Signal Circuits Using Labeled Hybrid Petri Nets., , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 30 (4): 617-630 (2011)Efficient Modeling and Verification of Analog/Mixed Signal Circuits Using Labeled Hybrid Petri nets.. University of Utah, USA, (2008)