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TDO-CIM: Transparent Detection and Offloading for Computation In-memory., , , , , , and . DATE, page 1602-1605. IEEE, (2020)A 380 fW Leakage Data Retention Flip-Flop for Short Sleep Periods., , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 70 (7): 2650-2654 (July 2023)Instruction-set architecture exploration strategies for deeply clustered VLIW ASIPs., , , and . MECO, page 38-41. IEEE, (2013)A Review of Near-Memory Computing Architectures: Opportunities and Challenges., , , , , , , and . DSD, page 608-617. IEEE Computer Society, (2018)Mixed-length SIMD code generation for VLIW architectures with multiple native vector-widths., , , , , and . ASAP, page 181-188. IEEE Computer Society, (2015)PR3: A system For radio-interferometry and radiation measurement on sounding rockets., , , , , , , , , and 9 other author(s). Microprocess. Microsystems, (2020)An Automated Flow to Map Throughput Constrained Applications to a MPSoC., , , , and . PPES, volume 18 of OASIcs, page 47-58. Schloss Dagstuhl - Leibniz-Zentrum fuer Informatik, Germany, (2011)Fast and Portable Vector DSP Simulation Through Automatic Vectorization., , and . SCOPES, page 47-53. ACM, (2018)Construction and exploitation of VLIW asips with multiple vector-widths., , , and . MECO, page 244-247. IEEE, (2014)BuildMaster: Efficient ASIP architecture exploration through compilation and simulation result caching., , , and . DDECS, page 83-88. IEEE Computer Society, (2014)