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Disambiguation of "Lee, Hyung-Min"

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Analog CMOS-based resistive processing unit for deep neural network training.

, , , and . MWSCAS, page 422-425. IEEE, (2017)

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Min Lee

Hyung-won Min

Hyung-Min Kim

Hyung-Min Kim

Hyung-Min Kim

 

Other publications of authors with the same name

A Wide-Load-Range and High-Slew Capacitor-Less NMOS LDO With Adaptive-Gain Nested Miller Compensation and Pre-Emphasis Inverse Biasing., , , and . IEEE J. Solid State Circuits, 58 (10): 2696-2708 (October 2023)A 80x60 Microbolometer CMOS Thermal Imager Integrated With a Low-Noise 12-B DAC., , , , and . IEEE Trans. Ind. Electron., 69 (8): 8604-8608 (2022)A Multi-Channel Neural Recording System With Neural Spike Scan and Adaptive Electrode Selection for High-Density Neural Interface., , , , , , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 70 (7): 2844-2857 (July 2023)Analog CMOS-based resistive processing unit for deep neural network training., , , and . MWSCAS, page 422-425. IEEE, (2017)A High Frequency Active Voltage Doubler in Standard CMOS Using Offset-Controlled Comparators for Inductive Power Transmission., and . IEEE Trans. Biomed. Circuits Syst., 7 (3): 213-224 (2013)A 2.45-GHz RF Energy Harvester with On-Chip 8-VCR SC Booster for IoT Devices., and . ISCAS, page 1-5. IEEE, (2021)Automated Reverse Engineering Tools for FPGA Bitstream Extraction and Logic Estimation., , , , and . ISOCC, page 328-329. IEEE, (2022)CMOS Leaky Integrate-and-Fire Neurons with Local Dynamic Biasing and Inhibitory Self-Oscillation., , , , and . BioCAS, page 1-5. IEEE, (2023)A 9V-Tolerant 71.4%-Efficiency Stacked-Switched-Capacitor Stimulation System with Level-Adaptive Switching Control and Rapid Stimulus-Synchronized Charge Balancing., , , , and . CICC, page 1-2. IEEE, (2023)A 92%-Efficiency Inductor-Charging Switched-Capacitor Stimulation System with Level-Adaptive Duty Modulation and Offset Charge Balancing for Muscular Stimulation., , , , , , , and . CICC, page 1-2. IEEE, (2022)