( en | de | ru )

 

Disambiguation of "Kumm, Martin"

Author of the publication

copydeleteadd this publication to your clipboard
Design-Space Exploration with Multi-Objective Resource-Aware Modulo Scheduling.

, , , , , and . Euro-Par, volume 11725 of Lecture Notes in Computer Science, page 170-183. Springer, (2019)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Elisabeth Kumm

Thomas Kumm

Renate Kumm

August Kumm

Uwe Kumm

 

Other publications of authors with the same name

Digital hilbert transformers for FPGA-based phase-locked loops., and . FPL, page 251-256. IEEE, (2008)Design of Optimal Multiplierless FIR Filters With Minimal Number of Adders., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 42 (2): 658-671 (February 2023)Optimal Single Constant Multiplication Using Ternary Adders., , , and . IEEE Trans. Circuits Syst. II Express Briefs, 65-II (7): 928-932 (2018)More AddNet: A deeper insight into DNNs using FPGA-optimized multipliers., , , , , and . ISCAS, page 1-5. IEEE, (2023)Hardware-Aware Quantization for Multiplierless Neural Network Controllers., , , and . APCCAS, page 541-545. IEEE, (2022)Resource Optimal Truncated Multipliers for FPGAs., , and . ARITH, page 102-109. IEEE, (2021)Karatsuba with Rectangular Multipliers for FPGAs., , , , and . ARITH, page 13-20. IEEE, (2018)Table-Based versus Shift-And-Add Constant Multipliers for FPGAs., , , and . ARITH, page 151-158. IEEE, (2019)Heuristics for the Design of Large Multipliers for FPGAs., , and . ARITH, page 17-24. IEEE, (2020)Comparison of Arithmetic Number Formats for Inference in Sum-Product Networks on FPGAs., , , and . FCCM, page 75-83. IEEE, (2020)