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Timed Shannon Circuits: A Power-Efficient Design Style and Synthesis Tool., , , и . DAC, стр. 254-260. ACM Press, (1995)Solving the State Assignment Problem for Signal Transition Graphs., , , и . DAC, стр. 568-572. IEEE Computer Society Press, (1992)Testing redundant asynchronous circuits by variable phase splitting., , и . EURO-DAC, стр. 328-333. IEEE Computer Society, (1994)Acceleration by Inline Cache for Memory-Intensive Algorithms on FPGA via High-Level Synthesis., , , и . IEEE Access, (2017)Design of Asynchronous Controllers with Delay Insensitive Interface., , , , , и . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 85-A (12): 2577-2585 (2002)Virtual Platform-Based Design Space Exploration of Power-Efficient Distributed Embedded Applications., , , , , , , и . ACM Trans. Embed. Comput. Syst., 14 (3): 49:1-49:25 (2015)A Survey on Design Methodologies for Accelerating Deep Learning on Heterogeneous Architectures., , , , , , , , , и 16 other автор(ы). CoRR, (2023)Software Development for High-Performance, Reconfigurable, Embedded Multimedia Systems., , и . IEEE Des. Test Comput., 22 (1): 28-38 (2005)A region-based theory for state assignment in speed-independent circuits., , , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 16 (8): 793-812 (1997)Quasi-static Scheduling for Concurrent Architectures., , , , и . Fundam. Informaticae, 62 (2): 171-196 (2004)