( en | de | ru )

 

Disambiguation of "Radhakrishnan, Damu"

Author of the publication

copydeleteadd this publication to your clipboard
A Low-Power Pipelined Implementation of 2D Discrete Wavelet Transform.

, , , and . ESA/VLSI, page 40-46. CSREA Press, (2004)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Radhakrishnan Srinivasan

Isamat Nicholas Damuria

Martin Damus

Wolfgang Damus

Renate Damus

 

Other publications of authors with the same name

A high performance RNS multiply-accumulate unit., , and . ACM Great Lakes Symposium on VLSI, page 145-148. ACM, (2001)Delay Efficient 32-Bit Carry-Skip Adder., and . VLSI Design, (2008)A Parallel Approach to Direct Analog-to-Residue Conversion., and . Inf. Process. Lett., 69 (5): 249-252 (1999)Low-Power Dynamic Scheduling in Heterogeneous Systems., , and . Embedded Systems and Applications, page 261-267. CSREA Press, (2003)A Low Energy Deep Sub-Micron Bus Coding Technique., , and . ESA/VLSI, page 25-30. CSREA Press, (2004)Power Optimized Combinational Logic Design., , , , and . Embedded Systems and Applications, page 223-227. CSREA Press, (2003)Redundant binary partial product generators for compact accumulation in Booth multipliers., and . Microelectron. J., 40 (11): 1606-1612 (2009)A Novel Bus Encoding Technique for Low Power VLSI., and . ESA/VLSI, page 54-62. CSREA Press, (2004)Experimental Analysis of Batteries Under Continuous and Intermittent Operations., , , , and . ESA/VLSI, page 18-24. CSREA Press, (2004)Switching Activity Minimization in Combinational Logic Design., , , , and . ESA/VLSI, page 47-53. CSREA Press, (2004)