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Disambiguation of "Lee, Robin"

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12.3 A low-power and high-performance 10nm SRAM architecture for mobile applications.

, , , , , , , , , , , , , and . ISSCC, page 210-211. IEEE, (2017)

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Nehemia Robinson

Meinhard Robinow

Gnana Robinson

Helga Robinson-Hammerstein

Klaus-P Robiné

 

Other publications of authors with the same name

A 20nm 112Mb SRAM in High-к metal-gate with assist circuitry for low-leakage and low-VMIN applications., , , , , , , , , and 5 other author(s). ISSCC, page 316-317. IEEE, (2013)A 28nm high-k metal-gate SRAM with Asynchronous Cross-Couple Read Assist (AC2RA) circuitry achieving 3x reduction on speed variation for single ended arrays., , , , , , , and . VLSIC, page 64-65. IEEE, (2012)A 3nm 256Mb SRAM in FinFET Technology with New Array Banking Architecture and Write-Assist Circuitry Scheme for High-Density and Low-VMIN Applications., , , , , , , , , and 8 other author(s). VLSI Technology and Circuits, page 1-2. IEEE, (2023)12.3 A low-power and high-performance 10nm SRAM architecture for mobile applications., , , , , , , , , and 4 other author(s). ISSCC, page 210-211. IEEE, (2017)A Differential Data-Aware Power-Supplied (D 2 AP) 8T SRAM Cell With Expanded Write/Read Stabilities for Lower VDDmin Applications., , , , , , , and . IEEE J. Solid State Circuits, 45 (6): 1234-1245 (2010)Developing a DSS for Allocating Gates to Flights at an International Airport., , , , and . IJDSST, 1 (1): 46-68 (2009)15.1 A 5nm 135Mb SRAM in EUV and High-Mobility-Channel FinFET Technology with Metal Coupling and Charge-Sharing Write-Assist Circuitry Schemes for High-Density and Low-VMIN Applications., , , , , , , , , and 2 other author(s). ISSCC, page 238-240. IEEE, (2020)A configurable 2-in-1 SRAM compiler with constant-negative-level write driver for low Vmin in 16nm Fin-FET CMOS., , , , , and . A-SSCC, page 145-148. IEEE, (2014)A 0.6 V Dual-Rail Compiler SRAM Design on 45 nm CMOS Technology With Adaptive SRAM Power for Lower VDD_min VLSIs., , , , , , , and . IEEE J. Solid State Circuits, 44 (4): 1209-1215 (2009)12.1 A 7nm 256Mb SRAM in high-k metal-gate FinFET technology with write-assist circuitry for low-VMIN applications., , , , , , , , , and 6 other author(s). ISSCC, page 206-207. IEEE, (2017)