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Disambiguation of "Conti, Francesco"

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Vega: A 10-Core SoC for IoT End-Nodes with DNN Acceleration and Cognitive Wake-Up From MRAM-Based State-Retentive Sleep Mode.

, , , , , , , , , , , and . CoRR, (2021)

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Francesco Conti

Andrea Conti

Luisa Conti

Maria Conti

Christian Conti

 

Other publications of authors with the same name

Always-On 674uW @ 4GOP/s Error Resilient Binary Neural Networks with Aggressive SRAM Voltage Scaling on a 22nm IoT End-Node., , , , and . CoRR, (2020)An Extreme-Edge TCN-Based Low-Latency Collision-Avoidance Safety System for Industrial Machinery., , , , , , , , and . IEEE Access, (2024)Long Short-Term Memory-Based Neural Networks for Missile Maneuvers Trajectories Prediction⋆., , , , and . IEEE Access, (2023)RNN-Based Radio Resource Management on Multicore RISC-V Accelerator Architectures., , , and . IEEE Trans. Very Large Scale Integr. Syst., 29 (9): 1624-1637 (2021)Marsellus: A Heterogeneous RISC-V AI-IoT End-Node SoC with 2-to-8b DNN Acceleration and 30%-Boost Adaptive Body Biasing., , , , , , , , and . CoRR, (2023)DORY: Automatic End-to-End Deployment of Real-World DNNs on Low-Cost IoT MCUs., , , , , and . IEEE Trans. Computers, 70 (8): 1253-1268 (2021)A Heterogeneous In-Memory Computing Cluster for Flexible End-to-End Inference of Real-World Deep Neural Networks., , , , , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 12 (2): 422-435 (2022)RISC-V Processor Technologies for Aerospace Applications in the ISOLDE Project., , , , , , , , , and 13 other author(s). SAMOS, volume 14385 of Lecture Notes in Computer Science, page 363-378. Springer, (2023)PULP-TrainLib: Enabling On-Device Training for RISC-V Multi-core MCUs Through Performance-Driven Autotuning., , , , , and . SAMOS, volume 13511 of Lecture Notes in Computer Science, page 200-216. Springer, (2022)A Topological Machine Learning Pipeline for Classification., , and . CoRR, (2023)