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A 6.4-Gb/s CMOS SerDes core with feed-forward and decision-feedback equalization.

, , , , , , , , , , and . IEEE J. Solid State Circuits, 40 (12): 2633-2645 (2005)

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A 1.6Tb/s Chiplet over XSR-MCM Channels using 113Gb/s PAM-4 Transceiver with Dynamic Receiver-Driven Adaptation of TX-FFE and Programmable Roaming Taps in 5nm CMOS., , , , , , , , , and 5 other author(s). ISSCC, page 122-124. IEEE, (2022)10+ Gb/s 90nm CMOS serial link demo in CBGA package., , , , , , , and . CICC, page 27-30. IEEE, (2004)A 0.18-μm SiGe BiCMOS receiver and transmitter chipset for SONET OC-768 transmission systems., , , , and . IEEE J. Solid State Circuits, 38 (12): 2147-2154 (2003)SiGe BiCMOS integrated circuits for high-speed serial communication links., , , , , , , , , and 2 other author(s). IBM J. Res. Dev., 47 (2-3): 259-282 (2003)40-Gb/s circuits built from a 120-GHz fT SiGe technology., , , , , , , , , and 3 other author(s). IEEE J. Solid State Circuits, 37 (9): 1106-1114 (2002)Root cause identification of an hard-to-find on-chip power supply coupling fail., , , , , , and . ITC, page 1-7. IEEE Computer Society, (2012)A 6.4-Gb/s CMOS SerDes core with feed-forward and decision-feedback equalization., , , , , , , , , and 1 other author(s). IEEE J. Solid State Circuits, 40 (12): 2633-2645 (2005)10+ gb/s 90-nm CMOS serial link demo in CBGA package., , , , , , , and . IEEE J. Solid State Circuits, 40 (9): 1987-1991 (2005)