Author of the publication

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Interconnect accelerating techniques for sub-100-nm gigascale systems.

H. Huang, and S. Chen. IEEE Trans. Very Large Scale Integr. Syst., 12 (11): 1192-1200 (2004)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Shih Chen Chen

Shih Chen

Yue-Shih Chen

Ying-Shih Chen

Hsing-Shih Chen

Other publications of authors with the same name

Bandwidth-Efficient Generalized Differential Spatial Modulation.R. Wei, S. Chen, Y. Lin, and B. Chen. IEEE Trans. Veh. Technol., 72 (1): 601-610 (2023)Missing Teeth and Restoration Detection Using Dental Panoramic Radiography Based on Transfer Learning With CNNs.S. Chen, T. Chen, Y. Huang, C. Chen, H. Chou, Y. Huang, W. Lin, T. Li, J. Yuan, P. Abu and 1 other author(s). IEEE Access, (2022)VLSI implementation of an ultra-low-cost and low-power image compressor for wireless camera networks.S. Chen, J. Nie, T. Lin, R. Chung, C. Hsia, T. Liu, S. Lin, and H. Wu. J. Real Time Image Process., 14 (4): 803-812 (2018)VLSI implementation of a lossless ECG encoder design with fuzzy decision and two-stage Huffman coding for wireless body sensor network.G. Luo, S. Chen, and T. Lin. ICICS, page 1-4. IEEE, (2013)NR-Bitstream video quality metrics for SSIM using encoding decisions in AVC and HEVC coded videos.T. Lin, N. Yang, R. Syu, C. Liao, W. Tsai, C. Chou, and S. Chen. J. Vis. Commun. Image Represent., (2015)Interconnect accelerating techniques for sub-100-nm gigascale systems.H. Huang, and S. Chen. IEEE Trans. Very Large Scale Integr. Syst., 12 (11): 1192-1200 (2004)Low-Power, Large-Area and High-Performance CdSe Quantum Dots/Reduced Graphene Oxide Photodetectors.Y. Shih, Y. Chen, J. Tan, S. Chang, W. Uen, S. Chen, M. Lin, Y. Chen, and W. Tu. IEEE Access, (2020)A new Schmitt trigger circuit in a 0.13-μm 1/2.5-V CMOS process to receive 3.3-V input signals.S. Chen, and M. Ker. IEEE Trans. Circuits Syst. II Express Briefs, 52-II (7): 361-365 (2005)Ultra-High-Voltage Charge Pump Circuit in Low-Voltage Bulk CMOS Processes With Polysilicon Diodes.M. Ker, and S. Chen. IEEE Trans. Circuits Syst. II Express Briefs, 54-II (1): 47-51 (2007)An efficient memory controller for 3D heterogeneous integration platform.Y. Liu, C. Yang, S. Chen, C. Chiu, C. Wu, and C. Huang. VLSI-DAT, page 1-4. IEEE, (2012)

BibSonomy

Disambiguation of "Chen, Shih-Lun"

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Interconnect accelerating techniques for sub-100-nm gigascale systems.

Please choose a person to relate this publication to

Shih Chen Chen

Shih Chen

Yue-Shih Chen

Ying-Shih Chen

Hsing-Shih Chen

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Chen, Shih-Lun"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Interconnect accelerating techniques for sub-100-nm gigascale systems.

Please choose a person to relate this publication to

Shih Chen Chen

Shih Chen

Yue-Shih Chen

Ying-Shih Chen

Hsing-Shih Chen

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Interconnect accelerating techniques for sub-100-nm gigascale systems.