( en | de | ru )

 

Disambiguation of "Lu, Tianyue"

Author of the publication

copydeleteadd this publication to your clipboard
Twin-Load: Building a Scalable Memory System over the Non-Scalable Interface.

, , , , and . CoRR, (2015)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Tianyue Zhu

Lu Lu

Chison Lu

Baufa Lu

Lu Zhang

 

Other publications of authors with the same name

Achieving efficient packet-based memory system by exploiting correlation of memory requests., , and . DATE, page 1-6. European Design and Automation Association, (2014)LSP: Collective Cross-Page Prefetching for NVM., , , and . DATE, page 501-506. IEEE, (2021)HoPP: Hardware-Software Co-Designed Page Prefetching for Disaggregated Memory., , , , , , , , , and . HPCA, page 1168-1181. IEEE, (2023)Rethinking Design Paradigm of Graph Processing System with a CXL-like Memory Semantic Fabric., , , , and . CCGrid, page 25-35. IEEE, (2023)Twin-Load: Bridging the Gap between Conventional Direct-Attached and Buffer-on-Board Memory Systems., , , , , and . MEMSYS, page 164-176. ACM, (2016)Asynchronous Memory Access Unit for General Purpose Processors., , , and . CoRR, (2021)TDV Cache: Organizing Off-Chip DRAM Cache of NVMM from a Fusion Perspective., , , and . ICCD, page 65-72. IEEE Computer Society, (2017)System measurement of Intel AEP Optane DIMM., , and . CoRR, (2020)MARB: Bridge the Semantic Gap between Operating System and Application Memory Access Behavior., , , , , , , , , and 1 other author(s). DATE, page 1-6. IEEE, (2023)Make Page Coloring more Efficient on Slice-Based Three-Level Cache., , , and . ICPADS, page 310-317. IEEE, (2019)