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DYRE: a DYnamic REconfigurable solution to increase GPGPU's reliability.

, , , and . J. Supercomput., 77 (10): 11625-11642 (2021)

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FPGA PAL Design Tools.. Wiley Encyclopedia of Computer Science and Engineering, John Wiley & Sons, Inc., (2008)On the optimal reconfiguration times for TMR circuits on SRAM based FPGAs., and . AHS, page 9-14. IEEE, (2013)Functional Failure Rate Due to Single-Event Transients in Clock Distribution Networks., , , and . CoRR, (2020)On the Estimation of Complex Circuits Functional Failure Rate by Machine Learning Techniques., , , , and . CoRR, (2020)FireNN: Neural Networks Reliability Evaluation on Hybrid Platforms., , and . IEEE Trans. Emerg. Top. Comput., 10 (2): 549-563 (2022)RESCUE: Interdependent Challenges of Reliability, Security and Quality in Nanoelectronic Systems., , , , , , , , , and 8 other author(s). CoRR, (2019)Online Test of Control Flow Errors: A New Debug Interface-Based Approach., , , , , , and . IEEE Trans. Computers, 65 (6): 1846-1855 (2016)Validation and robustness assessment of an automotive system., , , , , and . IDT, page 1-6. IEEE, (2013)A Fault Injection Environment for SoPC's Embedded Microprocessors., , , , and . LATW, page 68-73. IEEE, (2006)Evaluating Software-based Hardening Techniques for General-Purpose Registers on a GPGPU., , , , and . LATS, page 1-6. IEEE, (2020)