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Disambiguation of "Woods, Roger F."

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Design of an OFDM Physical Layer Encryption Scheme.

, , , and . IEEE Trans. Veh. Technol., 66 (3): 2114-2127 (2017)

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Roger Woods

Roger F Dangel

Sonja Ann Woods

Dorian Woods

Sophia Catherine Woods

 

Other publications of authors with the same name

High Speed FPGA-Based Implementations of Delayed-LMS Filters., , , and . VLSI Signal Processing, 39 (1-2): 113-131 (2005)Multidimensional DSP Core Synthesis for FPGA., , , and . VLSI Signal Processing, 43 (2-3): 207-221 (2006)Transforming Signal Processing Applications into Parallel Implementations., , , and . EURASIP J. Adv. Signal Process., (2007)Highly efficient, limited range multipliers for LUT-based FPGA architectures., and . IEEE Trans. Very Large Scale Integr. Syst., 12 (10): 1113-1118 (2004)FPGA-Based Soft-Core Processors for Image Processing Applications., , , , , and . J. Signal Process. Syst., 87 (1): 139-156 (2017)NanoStreams: A Microserver Architecture for Real-Time Analytics on Fast Data Streams., , , , , , , , and . IEEE Trans. Multi Scale Comput. Syst., 4 (3): 396-409 (2018)Efficient, Dynamic Multi-Task Execution on FPGA-Based Computing Systems., , , and . IEEE Trans. Parallel Distributed Syst., 33 (3): 710-722 (2022)FPGA Soft-Core Processors, Compiler and Hardware Optimizations Validated Using HOG., , , , , and . ARC, volume 9625 of Lecture Notes in Computer Science, page 78-90. Springer, (2016)Memory-Centric Hardware Synthesis from Dataflow Models., , and . SAMOS, volume 5114 of Lecture Notes in Computer Science, page 197-206. Springer, (2008)Soft IP core implementation of recursive least squares filter using only multplicative and additive operators., , and . FPL, page 597-600. IEEE, (2007)