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Disambiguation of "Park, Jongsun"

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A Refresh-Less eDRAM Macro With Embedded Voltage Reference and Selective Read for an Area and Power Efficient Viterbi Decoder.

, , and . IEEE J. Solid State Circuits, 50 (10): 2451-2462 (2015)

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Rosemary Park

Sungjune Park

Eunhong Park

Younggyu Park

Hyeyoung Park

 

Other publications of authors with the same name

A Perspective on Test Methodologies for Supervised Machine Learning Accelerators., , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 9 (3): 562-569 (2019)Spin Orbit Torque-RAM Write Energy Reduction with Self-Verification Scheme., and . ISOCC, page 19-20. IEEE, (2018)Priority Based Error Correction Code (ECC) for the Embedded SRAM Memories in H.264 System., , , and . J. Signal Process. Syst., 73 (2): 123-136 (2013)FTFD: an informatics pipeline supporting phylogenomic analysis of fungal transcription factors., , , , , , , , , and 5 other author(s). Bioinform., 24 (7): 1024-1025 (2008)Overview of Circuits, Systems, and Applications of Spintronics., , , , , , , , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 6 (3): 265-278 (2016)A distributed MAC design for data collision-free wireless USB home networks., , , and . IEEE Trans. Consumer Electronics, 55 (3): 1337-1343 (2009)Bit-width reduction and customized register for low cost convolutional neural network accelerator., , , and . ISLPED, page 1-6. IEEE, (2017)Adaptive Clock Generation Technique for Variation-Aware Subthreshold Logics., , and . IEEE Trans. Circuits Syst. II Express Briefs, 59-II (9): 587-591 (2012)Wearables, Implants, and Internet of Things: The Technology Needs in the Evolving Landscape., , and . IEEE Trans. Multi Scale Comput. Syst., 2 (2): 123-128 (2016)Bit Parallel 6T SRAM In-memory Computing with Reconfigurable Bit-Precision., , , , and . DAC, page 1-6. IEEE, (2020)